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ML555 Board
Serial Bus Development
The ML555 board is supported by a LogiCORE endpoint wrapper to configure the
Integrated Endpoint Block for PCI Express operation in Virtex-5 LXT and SXT FPGAs:
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Virtex-5 FPGA LogiCORE Endpoint Block Plus Wrapper for PCI Express designs
This is the recommended wrapper for PCI Express designs. It provides many ease-of-
use features and optimal configuration for Endpoint applications while simplifying
the design process and reducing the time-to-market.
The endpoint solution is delivered through the Xilinx CORE Generator tool. Full access to
the core, including bitstream generation capability, can be obtained through registration at
no extra charge.
Additional technical information on Xilinx PCI Express solutions is available at:
www.xilinx.com/pciexpress
Refer to UG197 , Virtex-5 Integrated Endpoint Block User Guide for PCI Express Designs for
more information on the integrated Endpoint solution.
Kit Contents
The ML555 board kit includes the following:
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Virtex-5 FPGA ML555 board (XC5VLX50T-FFG1136C-1 speed grade FPGA)
Documentation and reference design CD
Time-out evaluation licenses for the LogiCORE IP for PCI and PCI-X designs
Drivers for Jungo Software Technologies WinDriver device driver development kit
can be downloaded from www.jungo.com/dnload.html and evaluated for 60 days
Xilinx Platform Cable USB programming cable
ISE? evaluation software
For assistance with any of these items, contact your local Xilinx distributor or visit the
Xilinx online store at www.xilinx.com .
The heart of the kit is the ML555 board. This manual provides comprehensive information
on this board.
ML555 Board
The ML555 board includes the following:
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XC5VLX50T-FFG1136C -1 speed grade FPGA
200-pin 1.8V SODIMM socket with 256 MB (32M x 64 bit) DDR2 SDRAM SODIMM
Three on-board clock sources, two differential SMA clock inputs, and two
programmable clock synthesizers:
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30 MHz LVCMOS
125 and 200 MHz Epson 2.5V EG-2121CA LVDS and LVPECL, respectively
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One Universal Serial Bus (USB) 2.0 port (USB interface cable not provided)
Support for up to four FPGA design images in two Xilinx XCF32P-FSG48C Platform
Flash configuration PROM devices
Static or dynamic device reconfiguration support with the XC2C32 CoolRunner? II
CPLD
Virtex-5 FPGA ML555 Development Kit
UG201 (v1.4) March 10, 2008
www.xilinx.com
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IAC24A INPUT MODULE AC 5MA 24VDC
IAC5EQ INPUT MODULE AC 10MA 5VDC
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